The present invention relates to the field of integrated circuits, particularly to programmable logic integrated circuits with macrocells having highly flexible interconnect.
Integrated circuits are important building blocks of the modern age. Technology continues to evolve and integrated circuits continue to provide improved functionality. As integrated circuits improve, so do the electronics systems that are built using integrated circuits. There are many types of integrated circuits such as memories, microprocessors, application specific integrated circuits (ASICs), and programmable logic. Programmable logic integrated circuits such as PALs, PLDs, FPGAs, LCAs, and others, are becoming more complex and continually evolving to provide more user-programmable features on a single integrated circuit.
Modern programmable logic integrated circuits incorporate programmable logic including logic gates, products terms, look-up tables, embedded user-programmable memories, digital signal processing, and microprocessors. These circuits are connected to each other via programmable interconnect lines such that a user-defined logic function is realized. But these programmable interconnect lines and related routing resources consume a large amount of die area. Thus, it is desirable to develop novel structures and methods that make efficient use of a device's programmable interconnect lines.
In order to implement a user-defined function, the specific circuits and programmable interconnect to be used are selected from among those available on the integrated circuit. This process is referred to as “fitting” the design on the programmable logic integrated circuit. A first time fitting routes the user-defined logic function on the integrated circuit. This fitting also determines the integrated circuit's pinout, which may then be used in the design of printed circuit boards.
If the user modifies or adds logic after board design begins, it is desirable to keep the same pinout so that the board layout does not have to be revised. But keeping the pinout fixed, or “locked,” reduces the flexibility that the fitter has to make changes needed, that is to do a second time fitting. Often, this means the user has to hand place and route parts of the design, or move to a larger and more expensive device.
Thus, what is needed are novel routing structures and methods that improve first time fitting of user-defined logic functions, as well as allow the fitter more flexibility when doing a second time fitting such that hand placing and routing or moving to a larger device can be avoided.